Elenco Understanding Logic Gates and Circuits Manuale Utente Pagina 41
- Pagina / 42
- Indice
- SEGNALIBRI
- Negation of Conjunction 2
- Negation of Disjunction 2
- Parts List 3
- Introduction 4
- Project 2: AND Gate 9
- Project 3: OR Gate 10
- Project 4: NAND Gate 11
- Project 5: NOR Gate 12
- Project 7: De Morgan’s Law 14
- Project 8: De Morgan’s Law 15
- Project 9: S-R NOR Latch 16
- Project 10: S-R NAND Latch 17
- Project 11: Gated S-R Latch 18
- Project 12: J-K Latch 19
- Project 13: Gated D Latch 21
- Project 14: Comparator 23
- Project 15: Half Adder 25
- Project 16: Half Subtractor 26
- Project 17: Multiplexer 27
- Quiz Answers 34
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